CY43070
Single-Chip Sync-buck Controller With USB PD3.1 Source Controller
Description
The CY43070/CY43070H (CY43070) is a single-chip synchronous buck controller (SBC) with USB Type-C® PD3.1 source controller to support Standard Power Range (SPR) / Programmable Power Supply (PPS) up to 21V, and Extended Power Range (EPR) / Adjustable Voltage Supply (AVS) up to 28V. It is targeted for DC power request and control for single-port or multiple-port charging applications.
The integration of SBC and PD3.1 decoder functions in the CY43070 results in small footprint and reduced PCB size for high-power density charging applications. By leveraging the MOS switches used by synchronous buck regulation, the PD output MOS switch for each port could be saved to reduce BOM cost. Meanwhile, the desired PD output power profile can be selected from the pre-loaded power data object (PDO) on the One-Time-Programmable (OTP) memory by external resistor to save extra 3rd party OTP programming cost and eases inventory control.
To support higher power efficiency, extreme low standby power, and smart power sharing for multiple-port applications, the CY43070 integrates I2C interface, I2C master/slave addressing scheme, interrupt and wake-up mechanism. Up to 8 port addresses is supported through resistor selection, the CY43070 can dynamically allocates pre-set power profile to each attached charging port and enter or exit standby mode for optimal power conservation.
Based on high-voltage process, the CY43070 offers VBUS short protection on CC1/CC2 pins up to 36V. Meanwhile, the CY43070 provides comprehensive safety protections, including over-voltage protection (OVP), over-current protection (OCP), over-thermal protection (OTP) and moisture detection between DP and DN pins.
The integration of SBC and PD3.1 decoder functions in the CY43070 results in small footprint and reduced PCB size for high-power density charging applications. By leveraging the MOS switches used by synchronous buck regulation, the PD output MOS switch for each port could be saved to reduce BOM cost. Meanwhile, the desired PD output power profile can be selected from the pre-loaded power data object (PDO) on the One-Time-Programmable (OTP) memory by external resistor to save extra 3rd party OTP programming cost and eases inventory control.
To support higher power efficiency, extreme low standby power, and smart power sharing for multiple-port applications, the CY43070 integrates I2C interface, I2C master/slave addressing scheme, interrupt and wake-up mechanism. Up to 8 port addresses is supported through resistor selection, the CY43070 can dynamically allocates pre-set power profile to each attached charging port and enter or exit standby mode for optimal power conservation.
Based on high-voltage process, the CY43070 offers VBUS short protection on CC1/CC2 pins up to 36V. Meanwhile, the CY43070 provides comprehensive safety protections, including over-voltage protection (OVP), over-current protection (OCP), over-thermal protection (OTP) and moisture detection between DP and DN pins.
Features
- Single chip buck controller with Type-C PD3.1 source controller
- Support USB PD3.1 v1.8 EPR/AVS up to 28V (CY43070H only)
- Support USB PD3.1 v1.8 SPR/PPS up to 21V
- Operating switching frequency from 125KHz to 425KHz
- Support high PWM duty cycle up to 99%
- Operating input voltage 3V to 36V
- Support By-Pass mode to enable input pass-through output
- Smart jitter for EMI performance
- Support legacy BC1.2, AFC, FCP, and QC3.0/4/4+/5.0
- Support I2C based topology up to 8 ports without external MCU
- Support I2C addresses up to 8 and assigned by resistor
- Support preloaded PDO profiles up to 8 and selected by resistor
- Support extreme low standby power (<100uA) with wake-up
- Comprehensive protection scheme - OVP, OCP, OTP and moisture detection between DP and DN
- VBUS short protection on CC1/CC2 pins up to 36V
- Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
- Halogen and Antimony Free. “Green” Device (Note 3)
Pin Assignments
W-QFN4040-24 (Type A1)Applications
- Extreme low standby power multiple-port Type C PD3.1 SPR(EPR) chargers, adaptors, power strips or power hubs.
- Type C PD3.1 SPR(EPR) charging for high voltage battery of portable outdoor generators
- Type C PD3.1 SPR(EPR) chargers for general purpose charging applications
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
2. Please contact http://www.canyon-semi.com.tw for more information of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
2. Please contact http://www.canyon-semi.com.tw for more information of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
Typical Applications Circuit
The CY43070, a high-integration of synchronous buck controller with USB PD3.1 EPR decoder, supports either single-port charging or multiple-port charging at optimal system BOM with extreme low standby power consumption.
The buck controller in CY43070 is a constant frequency synchronous step-down controller to cover middle and high power charging with integrated low-side and high-side drivers for external N-channel MOSFETs. The internal regulator supplies internal bias rails as well as the MOSFET gate drivers. The PWM control scheme is based on voltage mode control, and provides output current limiting capability by monitoring the voltage drop across the sense resistor between CSP and CSM pins. During normal operation, the output voltage is internally sensed through a resistive divider at FB pin, and a capacitor connected between VFB and VBUS is needed. The amplifier output pin, COMP, is connected to a compensation circuitry for loop stability. To enhance the converter power efficiency, the VIN DC power pass-through is supported by a By-Pass mode from the GATE pin.
Be noted that the CY43070 supports the PD3.1 SPR full range selection, while the CY43070H can support PD3.1 SPR and EPR range up to 28V.
One Port Solution in CY43070
With the high integration of CY43070, a compact one-port PD3.1 charger application circuit is shown in Figure 1. By leveraging the MOS switches used by synchronous buck regulation, the PD output VBUS MOS switch for each port could be saved to reduce BOM cost. Meanwhile, the desired PD output power profile can be selected from the pre-loaded power data object (PDO) on the One-Time-Programmable (OTP) memory by connecting a corresponding external resistor to GPIO/PSEL pin. It can save extra 3rd party OTP programming cost and eases inventory control. Meanwhile, the one-port solution can be modularized with some interface pins lined out for communication and control of other port and power stage during the multi-port application.
The buck controller in CY43070 is a constant frequency synchronous step-down controller to cover middle and high power charging with integrated low-side and high-side drivers for external N-channel MOSFETs. The internal regulator supplies internal bias rails as well as the MOSFET gate drivers. The PWM control scheme is based on voltage mode control, and provides output current limiting capability by monitoring the voltage drop across the sense resistor between CSP and CSM pins. During normal operation, the output voltage is internally sensed through a resistive divider at FB pin, and a capacitor connected between VFB and VBUS is needed. The amplifier output pin, COMP, is connected to a compensation circuitry for loop stability. To enhance the converter power efficiency, the VIN DC power pass-through is supported by a By-Pass mode from the GATE pin.
Be noted that the CY43070 supports the PD3.1 SPR full range selection, while the CY43070H can support PD3.1 SPR and EPR range up to 28V.
One Port Solution in CY43070
With the high integration of CY43070, a compact one-port PD3.1 charger application circuit is shown in Figure 1. By leveraging the MOS switches used by synchronous buck regulation, the PD output VBUS MOS switch for each port could be saved to reduce BOM cost. Meanwhile, the desired PD output power profile can be selected from the pre-loaded power data object (PDO) on the One-Time-Programmable (OTP) memory by connecting a corresponding external resistor to GPIO/PSEL pin. It can save extra 3rd party OTP programming cost and eases inventory control. Meanwhile, the one-port solution can be modularized with some interface pins lined out for communication and control of other port and power stage during the multi-port application.
Figure 1 – The CY43070 Application Circuit used for One-Port PD3.1 ChargingMulti-Port Solution in CY43070
For multiple-port PD3.1 charging in a high-power density output power, the CY43070 supports I2C Interface, I2C master/slave addressing scheme, low standby power design, and interrupt and wake-up mechanism to optimize system BOM and power efficiency.
The I2C master and slave address for all CY43070 is set by connecting an associated resister value on ASEL Pin. All of the smart power sharing operations are going through I2C interface and interrupt mechanism. Up to 8 ports can be supported without the need of external MCU. To
For multiple-port PD3.1 charging in a high-power density output power, the CY43070 supports I2C Interface, I2C master/slave addressing scheme, low standby power design, and interrupt and wake-up mechanism to optimize system BOM and power efficiency.
The I2C master and slave address for all CY43070 is set by connecting an associated resister value on ASEL Pin. All of the smart power sharing operations are going through I2C interface and interrupt mechanism. Up to 8 ports can be supported without the need of external MCU. To
Typical Applications Circuit (Cont.)
reduce the manufacturing cost, the PDO power profiles are pre-loaded on the CY43070 before chip shipping, and user can field-setting the desired power profile by interpretation of the attached resistance value and measured voltage present at the PSEL Pin.
Just like the one-port solution, the PD output VBUS MOS switch for each port could be saved by leveraging the MOS switches of the synchronous buck controller, and no need to spend the 3rd party OTP programming cost and ease the inventory management.
Meanwhile, the ADJ1 and ADJ2 pins of the Master CY43070 can be used to control the power stage output (VIN) just higher than the highest PDO voltage of all output ports to enhance all the DC/DC converter efficiency. Also, the PFCEN pin the Master CY43070 is used to turn on/off of the PFC stage to meet the electrical regulation.
Just like the one-port solution, the PD output VBUS MOS switch for each port could be saved by leveraging the MOS switches of the synchronous buck controller, and no need to spend the 3rd party OTP programming cost and ease the inventory management.
Meanwhile, the ADJ1 and ADJ2 pins of the Master CY43070 can be used to control the power stage output (VIN) just higher than the highest PDO voltage of all output ports to enhance all the DC/DC converter efficiency. Also, the PFCEN pin the Master CY43070 is used to turn on/off of the PFC stage to meet the electrical regulation.
Figure 2 – The CY43070 Circuit Topology used for Multi-Port PD3.1 Charging Application Functional Block Diagram
The CY2336 is an MCU-based, dual-channel, USB Type-C, PD3.1/PPS and QC5 protocol decoder. The device’s functional block diagram is shown below. With its hardware transceivers and multiplexed ADC, the rich multipurpose GPIOs can support many different kinds of applications.
Figure 3 – The CY43070 Block Diagram 